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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 電機工程學系 > 會議論文  >  Accurate RTL power estimation for a security processor

    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/13020

    Title: Accurate RTL power estimation for a security processor
    Authors: Kai-Shuang Chang
    Chia-Chien Weng
    Shi-Yu Huang
    教師: 黃錫瑜
    Date: 2005
    Publisher: Institute of Electrical and Electronics Engineers Inc.
    Relation: Emerging Information Technology Conference, 2005.
    15-16 Aug. 2005 Page(s):3 pp.
    Keywords: security processor
    register-transfer level
    Abstract: We summarize the experience of estimating the average power dissipation of a security processor (of 430K gates) using an in-house tool, called ToggleFinder. The estimation is done at the register-transfer level (RTL) so that the CPU time can be slashed dramatically. At the same time, the accuracy is retained by two techniques: power mode classification and scalable linear approximation. We found that a security processor containing a number of different encryption and decryption schemes, such as AES and RSA, could consume power very differently from one clock cycle to another. Also, the design gate count of a design block does not reflect how much power it consumes very well. Such a large design demonstrates that our new power estimation method is truly useful in a low-power design process.
    URI: http://nthur.lib.nthu.edu.tw/handle/987654321/13020
    Appears in Collections:[電機工程學系] 會議論文
    [積體電路設計技術研發中心] 會議論文

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