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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 電機工程學系 > 期刊論文 >  A 2.6-V, 44-MHz all-digital QPSK direct-sequence spread-spectrum transceiver IC [wireless LANs]


    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/12478


    Title: A 2.6-V, 44-MHz all-digital QPSK direct-sequence spread-spectrum transceiver IC [wireless LANs]
    Authors: Wu,Jen-Shi
    Liou,Ming-Luen
    Ma,Hsi-Pin
    Chiueh,Tzi-Dar
    教師: 馬席彬
    Date: 1997
    Publisher: Institute of Electrical and Electronics Engineers Inc.
    Relation: IEEE JOURNAL OF SOLID-STATE CIRCUITS,Volume 32,Issue 10, Pages 1499-1510,OCT 1997
    Keywords: CMOS digital integrated circuits
    quadrature phase shift keying
    spread spectrum communication
    transceivers
    wireless LAN
    Abstract: © 1997 Institute of Electrical and Electronics Engineers-In this paper, an all-digital differentially encoded quaternary phase shift keying (DEQPSK) direct sequence spread-spectrum (DSSS) transceiver is proposed. The transceiver consists of two parts: a baseband/IF spread-spectrum transmitter and a coherent intermediate frequency (IF) receiver. The center frequency of this IF receiver is 11 MHz and the sampling rate is 44 Msamples/s. Modulation/demodulation, carrier recovery, PN acquisition, and differential coding are all provided within a single chip. Functional optimization and architecture design were performed before layout implementation. The 0.8-μm N-well CMOS chip has a complexity of 56000 transistors with a core area of 3.5×3.5 mm2. Power dissipation is 92 and 145 mW at 2.6 and 3.3 V, respectively
    Relation Link: http://www.ieee.org/portal/site
    URI: http://nthur.lib.nthu.edu.tw/handle/987654321/12478
    Appears in Collections:[電機工程學系] 期刊論文
    [通訊工程研究所] 期刊論文
    [積體電路設計技術研發中心] 期刊論文

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