National Tsing Hua University Institutional Repository:Row-based cell placement method that utilizes circuit structural properties
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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 資訊工程學系 > 期刊論文 >  Row-based cell placement method that utilizes circuit structural properties


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    題名: Row-based cell placement method that utilizes circuit structural properties
    作者: Tsay,Yu-Wen
    Lin,Youn-Long
    日期: 1995
    出版者: Institute of Electrical and Electronics Engineers Inc
    關鍵詞: Integrated circuit layout
    Computer aided design
    Simulated annealing
    Standards
    Algorithms
    Macros
    Application specific integrated circuits
    Computational complexity
    摘要: We propose a cell placement method for row-based integrated circuit layout. The proposed method cleverly utilizes the structural properties of the circuits. It first extracts strongly connected subcircuits, called cones, from the circuit and then groups small cones, called fragments, to reduce the number of cones. The algorithm then performs a macro-cell placement, treating each cone as a soft macro. Next, it maps the resulting macro-cell placement into a row-based placement. Finally, it applies a simulated-annealing procedure to refine the row-based placement. It is able to produce, in a shorter period of CPU time, a higher quality placement compared to classical simulated-annealing-based placement methods as demonstrated by some experimental results on the MCNC benchmarks.
    相關連結: http://webservices.ieee.org/pindex_basic.html
    URI: http://nthur.lib.nthu.edu.tw/handle/987654321/12830
    顯示於類別:[資訊工程學系] 期刊論文
    [積體電路設計技術研發中心] 期刊論文
    [清大/工研院聯合研究中心] 期刊論文

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