National Tsing Hua University Institutional Repository:PLS: A scheduler for pipeline synthesis
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    Title: PLS: A scheduler for pipeline synthesis
    Authors: Hwang,Cheng-Tsung
    Date: 1993
    Publisher: Institute of Electrical and Electronics Engineers Inc
    Keywords: Pipeline processing systems
    Digital signal processing
    Abstract: Pipelining is an effective method to optimize the execution of a loop, especially for digital signal processing (DSP) applications where data enter a circuit regularly. Although throughout and delay are two important optimization criteria, previous work emphasizes mainly on the throughout. We show that the delay time of executing an iteration of a loop has a strong relationship with the cost of the registers and the controller. We iteratively use a forward scheduling and a backward scheduling to achieve this purpose.
    Relation Link:
    Appears in Collections:[Department of Computer Science] CS Journal / Magazine Articles
    [Design Technology Center ] DTC Journal / Magazine Articles
    [NTHU / ITRI Joint Research Center] NIJRC Journal / Magazine Articles

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