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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 電機工程學系 > 會議論文  >  40-Gb/s transimpedance amplifier in 0.18-μm CMOS technology


    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/12999


    Title: 40-Gb/s transimpedance amplifier in 0.18-μm CMOS technology
    Authors: Jun-De Jin
    Hsu, S.S.H.
    Date: 2006
    Publisher: Institute of Electrical and Electronics Engineers Inc.
    Keywords: CMOS integrated circuits
    inductors
    millimetre wave amplifiers
    S-parameters
    Abstract: A 40-Gb/s transimpedance amplifier (TIA) is realized in 0.18-μm CMOS technology. From the measured S-parameters, a transimpedance gain of 51.0 dBΩ and a 3-dB bandwidth up to 30.5 GHz (~0.5 fT) were observed. To the best of authors' knowledge, the TIA presents the widest bandwidth and highest GBP/Pdc of 180.1 GHzΩ/mW among the published results with similar technologies. A new bandwidth enhancement technique, π-type inductor peaking (PIP), is proposed, which gives a bandwidth enhancement factor of 3.31 without disturbing the low-frequency gain. Under a 1.8 V supply voltage, the TIA consumes 60.1 mW with a chip area of 1.17 × 0.46 mm2
    Relation Link: ESSCIRC 2006. Proceedings of the 32nd European Solid-State Circuits Conference (IEEE Cat. No. 06EX1347)
    http://www.ieee.org/portal/site
    URI: http://nthur.lib.nthu.edu.tw/handle/987654321/12999
    Appears in Collections:[電機工程學系] 會議論文
    [電子工程研究所] 會議論文
    [奈米工程與微系統研究所] 會議論文

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