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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 資訊工程學系 > 會議論文  >  An analytic net weighting approach for performance optimization in circuit placement


    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/13565


    Title: An analytic net weighting approach for performance optimization in circuit placement
    Authors: Tsay,Ren-Song
    Koehl,Juergen
    教師: 蔡仁松
    Date: 1991
    Publisher: Institute of Electrical and Electronics Engineers Inc
    Relation: Annual ACM IEEE Design Automation Conference,Proceedings of the 28th conference on ACM/IEEE design automation,1991, Page(s):620-625
    Keywords: Integrated Circuits
    CMOS
    Layout
    Mathematical Techniques
    Algorithms
    Performance
    Abstract: An efficient circuit placement approach which is based on analytic net weighting controls for nonlinear approach constraints is presented. The popular net weighting heuristic is justified by first showing that an appropriate net weighting is a natural result of the Kuhn-Tucker conditions of circuit placement optimization subject to the performance constraints. A quantitative analysis of the effect of net weighting to wire length change is given. An effective net weighting control algorithm has been implemented and applied to real chip designs. The results are promising. A performance-optimized result can be achieved in 13.2 s for a chip with 1403 circuits. An experimental CMOS chip with 45,296 circuits has a complete placement result in 40 min, while the wire length measure is 20.3% better than a simulated annealing approach.
    Relation Link: http://ieeexplore.ieee.org/Xplore/dynhome.jsp
    URI: http://nthur.lib.nthu.edu.tw/handle/987654321/13565
    Appears in Collections:[資訊工程學系] 會議論文
    [積體電路設計技術研發中心] 會議論文

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