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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 資訊工程學系 > 會議論文  >  Bit level systolic arrays for real time median filters

    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/13944

    Title: Bit level systolic arrays for real time median filters
    Authors: Long-Wen Chang
    Jing-Ho Lin
    Date: 1990
    Publisher: Institute of Electrical and Electronics Engineers Inc
    Keywords: bit level systolic array
    transposition network
    median filter
    Abstract: A bit-level systolic array based on the majority of a bit string of the input samples for a one-dimensional standard median filter is developed. The majority function is implemented by a 1-b odd/even transposition network, which can be designed very easily. For a window size n, the latency time and the computation time of the array are about n+6 times the gate delay. A bit-level systolic array for 2-D separable median filter is also proposed. It is constructed using the basic cells of the 1-D standard median filter.
    Relation Link: http://webservices.ieee.org/pindex_basic.html
    URI: http://nthur.lib.nthu.edu.tw/handle/987654321/13944
    Appears in Collections:[資訊工程學系] 會議論文
    [資訊系統與應用研究所] 會議論文
    [電腦與通訊科技研發中心] 會議論文

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