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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 資訊工程學系 > 會議論文  >  An AMBA-compliant deblocking filter IP for H.264/AVC


    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/14064


    Title: An AMBA-compliant deblocking filter IP for H.264/AVC
    Authors: Sheng-Yu Shih
    Cheng-Ru Chang
    Youn-Long Lin
    Date: 2005
    Publisher: Institute of Electrical and Electronics Engineers Computer Society
    Keywords: SRAM chips
    adaptive filters
    digital filters
    field programmable gate arrays
    integrated circuit design
    logic design
    storage management
    system-on-chip
    video coding
    Abstract: We propose an efficient hardware architecture for the deblocking filter function in H.264/AVC. We use a novel memory organization that results in significant saving in filtering time. Our design includes two 4/spl times/4 register sets and one 160/spl times/32 two-port SRAM such that filtering and transpose are carried out simultaneously. Synthesis results show that our design is small (19k gates) and high performance (100 MHz @ 0.25 /spl mu/m). An AMBA-compliant interface is added to our design for SOC integration and FPGA prototyping. Experimental results show that our design works well with the reference software JM 7.3 and achieves significant speed up, even with a huge communication overhead between the CPU and the hardware accelerator.
    Relation Link: http://webservices.ieee.org/pindex_basic.html
    URI: http://nthur.lib.nthu.edu.tw/handle/987654321/14064
    Appears in Collections:[資訊工程學系] 會議論文
    [積體電路設計技術研發中心] 會議論文

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