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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 電機資訊學院學士班 > 期刊論文 >  Hierarchical system test by an IEEE 1149.5 MTM-bus slave-moduleinterface core

    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/42021

    Title: Hierarchical system test by an IEEE 1149.5 MTM-bus slave-moduleinterface core
    Authors: Jin-Hua Hong;Chung-Hung Tsai;Cheng-Wen Wu
    教師: 吳誠文
    Date: 2000
    Publisher: Institute of Electrical and Electronics Engineers
    Relation: Very Large Scale Integration (VLSI) Systems, IEEE Transactions , Volume 8, Issue 5, Oct. 2000 , Page(s) 503 - 516
    Keywords: EEE standards
    automatic testing
    boundary scan testing
    field programmable gate arrays
    hierarchical systems
    Abstract: © 2000 Institute of Electrical and Electronics Engineers - An IEEE 1149.5 module test and maintenance (MTM) bus slave module interface core is presented, which is used for direct access from the system bus to the IEEE 1149.1 chip-level or on-chip buses to facilitate hierarchical system test and diagnosis. The hierarchical test methodology also is presented, which is applicable to the system-on-chip environment, All the standard 1149.1 instructions, such as SAMPLE/PRELOAD, EXTEST, BYPASS, and even RUNBIST, can be performed within three 1149.5 read/write-data message cycles. The messages are transmitted between the MTM-bus master module (Ill-module) and the slave module (S-module). We adopt the full test access port control method to activate the 1149.1 boundary-scan paths via the 1149.5 MTM-bus. Our S-module interface circuit implements 16 CORE commands and one read/write-data command. It has been prototyped using a field-programmable gate array chip and implemented by a full-custom chip. Hierarchical test of multiple 1149.1 compatible boards has been experimentally verified
    URI: http://www.ieee.org/
    Appears in Collections:[電機資訊學院學士班] 期刊論文

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