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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 電機工程學系 > 會議論文  >  The profile design of strained SiGe-channel p-type modulation doped FET

    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/42832

    Title: The profile design of strained SiGe-channel p-type modulation doped FET
    Authors: Hsu, K.Y.J.;Huang, S.M.
    教師: 徐永珍
    Date: 1997
    Publisher: Materials Research Society
    Relation: Infrared Applications of Semiconductors - Materials,Processing and Devices. Symposium
    Keywords: Ge-Si alloys
    high electron mobility transistors
    semiconductor materials
    Abstract: © 1997 Materials Research Society-To improve the performance of p-type SiGe-channel FETs is important for Si-based high-speed/high-frequency applications. This work discusses the design of germanium profiles in the strained Si1-xGex channel region of p-type SiGe modulation doped FETs and studies its effect on device performance. Two-dimensional device simulator is used to simulate the large-signal device performance for various Ge distributions including triangular, trapezoidal, and flat profiles. In particular, the thickness of the strained SiGe channel layer is 15 nm and a 5 nm thick Si cap layer is on top of the channel. It is found that with the same integrated Ge content in the strained channel, graded Ge profiles lead to higher transconductances and larger threshold voltage windows than those of flat profiles, due to deeper potential wells and better carrier confinement ability. For triangularly graded profiles, the peak position must be located in the upper half portion of the channel layer to result in superior performance. By adding more Ge to extend the peak region, triangular profiles become trapezoidal ones. However, more Ge content does not necessarily produce better performance. If the well depth of trapezoidal profile is the same as that of triangular profile and if the trapezoid plateau begins at the same position as that of triangle peak, the device performance is almost the same for both profiles
    URI: http://www.mrs.org/
    Appears in Collections:[電機工程學系] 會議論文

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