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    National Tsing Hua University Institutional Repository > 原子科學院  > 工程與系統科學系 > 期刊論文 >  High-performance polycrystalline silicon thin-film transistor with multiple nanowire channels and lightly doped drain structure


    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/47222


    Title: High-performance polycrystalline silicon thin-film transistor with multiple nanowire channels and lightly doped drain structure
    Authors: Yung-Chun Wu;Ting-Chang Chang;Chun-Yen Chang;Chi-Shen Chen;Chun-Hao Tu;Po-Tsun Liu;Hsiao-Wen Zan;Ya-Hsiang Tai
    教師: 吳永俊
    Date: 2004
    Publisher: American Institute of Physics
    Relation: APPLIED PHYSICS LETTERS, American Institute of Physics, Volume 84, Issue 19, MAY 10 2004, Pages 3822-3824
    Keywords: MOSFETS
    Abstract: This investigation examines polycrystalline silicon thin-film transistors (TFTs) with multiple nanowire channels and a lightly doped drain (LDD). A device with an LDD structure exhibits low leakage current because the lateral electrical field is reduced in the drain offset region. Additionally, multiple nanowire channels can generate fewer defects in the polysilicon grain boundary and have more efficient NH3 plasma passivation than single-channel TFTs, further reducing leakage current. They exhibit superior electrical characteristics to those of single-channel TFTs, such as a higher ON/OFF current ratio (>10(8)), a better subthreshold slope of 110 mV/decade, an absence of drain-induced barrier lowering, and suppressed kink-effect. Devices with the proposed TFTs are highly promising for use in active-matrix liquid-crystal display technologies. (C) 2004 American Institute of Physics.
    URI: http://www.aip.org/
    http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/47222
    Appears in Collections:[工程與系統科學系] 期刊論文

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