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    Collection

    ENE Conference Papers [40/54]
    ENE Journal / Magazine Articles [132/142]
    retired tests [15/15]

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    Showing items 1-25 of 350. (14 Page(s) Totally)
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    DateTitleAuthors
    2011 An Offset-Tolerant Current-Sampling-Based Sense Amplifier for Sub-100nA-Cell-Current Nonvolatile Memory Meng-Fan Chang; Shin-Jang Shen; Chia-Chi Liu; Che-Wei Wu; Yu-Fan Lin; Shang-Chi Wu; Chia-En Huang; Han-Chao Lai; Ya-Chin King; Chorng-Jung Lin; Hung-Jen Liao; Yu-Der Chih; Yamauchi, H.
    2012 A 0.5V 4Mb Logic-Process Compatible Embedded Resistive RAM (ReRAM) in 65nm CMOS Using Low Voltage Current-Mode Sensing Scheme with 45ns Random Read Time Meng-Fan Chang; Che-Wei Wu; Chia-Cheng Kuo; Shin-Jang Shen; Ku-Feng Lin; Shu-Meng Yang; Ya-Chin King; Chorng-Jung Lin; Yu-Der Chih
    2010 Source Side Injection Programmed P-Channel Self-Aligned-Nitride One-Time Programming Cell for 90 nm Logic Nonvolatile Memory Applications Chia-En Huang; Ying-Je Chen; Hsun OuYang; Chrong-Jung Lin; Ya-Chin King
    2011 Influence of Passivation Layers on Characteristics of a-InGaZnO Thin-Film Transistors Shou-En Liu; Ming-Jiue Yu; Chang-Yu Lin; Geng-Tai Ho; Chun-Cheng Cheng; Chih-Ming Lai; Chrong-Jung Lin; Ya-Chin King; Yung-Hui Yeh
    2011 A New High-Density and Ultrasmall-Cell-Size Contact RRAM (CR-RAM) With Fully CMOS-Logic-Compatible Technology and Circuits Tseng, Yuan Heng; Chia-En Huang; Kuo, C.; Chih, Y.-D.; Ya-Chin King; Chrong Jung Lin
    2011 A New Sensing Scheme for Sensitivity Enhancement of Low-Temperature Chih-Yang Chen; Chrong-Jung Lin; Ya-Chin King
    2011 A New Differential P-Channel Logic-Compatible Multiple-Time Programmable (MTP) Memory Te-Liang Lee; Yi-Hung Tsai; Wun-Jie Lin; Hsiao-Lan Yang; Chiu-Wang Lien; Chrong Jung Lin; Ya-Chin King
    2011 Three-Dimensional 4F2 ReRAM with Vertical BJT Driver by CMOS Logic Compatible Process Ching-Hua Wang; Yi-Hung Tsai; Kai-Chun Lin; Meng-Fan Chang; Ya-Chin King; Chrong Jung Lin; Shyh-Shyuan Sheu; Yu-Sheng Chen; Heng-Yuan Lee; Chen, F.T.; Ming-Jinn Tsai
    2011 A High Density MTP Cell with Contact Coupling Gates by Pure CMOS Logic Process Haw-Yun Wu; Cheng-Wei Tsai; Chiu-Wang Lien; Chih, Y.-D.; Chrong Jung Lin
    2010 Tight-binding calculation with up to the 3rd nearest neighbor coupling for small-radius carbon nanotubes Wei-Yang Lo; George Y.-S. Wu
    2010 Effects of pair correlation on mean-field theory of BTW sand pile model H.-S. Chen; G. Y.Wu
    2011 Study of Si-based three-dimensional photonic crystals infiltrated with liquid crystal within a one-dimensional effective model L. Chang; C.-Z. Liao; G. Y. Wu
    2011 Graphene quantum dots for valley-based quantum computing: A feasibility study G. Y. Wu; N.-Y. Lue; L. Chang
    2012 Valley-based field-effect transistors in graphene M.-K. Lee; N.-Y. Lue; C.-K. Wen; G. Y. Wu
    2012 Graphene-based qubits in quantum communications G. Y. Wu; N.-Y. Lue
    2013 The Practical Measurement Setup of DPI Method above 1 GHz for Ics Chang, Yin-Cheng; Hsu, Shawn S. H.; Peng, Kang-Chu; Chang, Yen-Tang; Chen, Chiu-Kuo; Cheng, Hsu-Chen; Chang, Da-Chiang
    2013 102學年度電子工程研究所考古題 電子工程研究所
    2012 101學年度電子工程研究所考古題 電子工程研究所
    2011 100學年度電子工程研究所考古題 電子工程研究所
    2010 99學年度電子工程研究所考古題 電子工程研究所
    2009 98學年度電子工程研究所考古題 電子工程研究所
    2008 97學年度電子工程研究所考古題 電子工程研究所
    2007 96學年度電子工程研究所考古題 電子工程研究所
    2006 95學年度電子工程研究所考古題 電子工程研究所
    2005 94學年度電子工程研究所考古題 -

    Showing items 1-25 of 350. (14 Page(s) Totally)
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