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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 資訊工程學系 > 會議論文  >  Software Cache Support and API Design for Embedded DSP Processor


    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/66784


    Title: Software Cache Support and API Design for Embedded DSP Processor
    Authors: Cheng-Yen Lin;Shao-Chung Wang;Ming-Yu Hung;Kun-Yuan Hsieh;Jenq-Kuen Lee
    教師: 李政崑
    Date: 2010
    Relation: SoC Design Conference (ISOCC),2009 International,Issue Date: 22-24 Nov. 2009,On page(s): 161 - 164
    Keywords: Software Cache Support
    API Design
    Embedded DSP Processor
    Abstract: In embedded SoC design, memory hierarchies are playing increasingly important roles for system performances. There is a significant latency gap between internal and external memory accesses. The external memory access might downgrade the performance of embedded systems. Application developers must explicitly handle data transfer between external and internal memories. That is a burden for programmers. In this paper, we propose a software cache API to help programmers to ease this problem. The proposed API includes pointwise element access and block version of access to software cache. We also give a detailed description for design and implementation of software cache API. As a case study, the software cache API is implemented on PAC DSP, a high performance DSP aiming for multi-media applications. We evaluate the implementation with UTDSP benchmark suite. The experiment results show that the proposed software cache can efficiently reduce the external memory access times.
    URI: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/66784
    Appears in Collections:[資訊工程學系] 會議論文

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