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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 電機工程學系 > 會議論文  >  Optimizing sensitivity of a latched sense amplifier for CMOS SRAM using a simulation-based method


    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/68206


    Title: Optimizing sensitivity of a latched sense amplifier for CMOS SRAM using a simulation-based method
    Authors: Chou, Yung-Fa;Kwai, Ding-Ming;Wu, Cheng-Wen
    教師: 吳誠文
    Date: 2001
    Publisher: Institute of Electrical and Electronics Engineers
    Relation: 9th International Symposium on Integrated Circuits, Devices and Systems, ISIC 2001: Proceedings - Low Power and Low Voltage Integrated Systems, September 3-5, 2001, Pages 203-206
    Keywords: Amplifiers (electronic)
    CMOS integrated circuits
    Mathematical models
    Optimization
    Sensitivity analysis
    Abstract: Transistor sizing of a latched sense amplifier is shown to be able to trade sensitivity for area, speed, and power. Because of the parametric variations inherent in a manufacturing process, the bit-line drive/load in an SRAM may vary wildly. Generally, low-sensitivity but high-speed sense amplifiers can work, if the voltage-differentiating rate on a bit-line pair is large enough to develop a significant voltage difference during sensing; otherwise, a high-sensitivity but low-speed sense amplifier must be used. We model the worst-case voltage-differentiating rate, based on TSMC 0.25 μm, 0.18μm, and 0.13μm generic CMOS technologies. The sensitivity of the sense amplifier is derived by equivalent channel length mismatches which link the design margins to the tolerances to process variations. We propose a simulation-based method to optimize the transistor sizing. The optimized sense amplifier achieves higher sensitivity and less power consumption than the original one. It is demonstrated in a 16K × 256 embedded synchronous SRAM.
    Relation Link: http://www.ieee.org/
    URI: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/68206
    Appears in Collections:[電機工程學系] 會議論文

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