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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 電機工程學系 > 會議論文  >  A new self-aligned nitride MTP cell with 45 nm CMOS fully compatible process


    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/68448


    Title: A new self-aligned nitride MTP cell with 45 nm CMOS fully compatible process
    Authors: Chia-En Huang;Hsin-Ming Chen;Han-Chao Lai;Ying-Je Chen;Ya-Chin King;Chrong Jung Lin
    教師: 林崇榮
    Date: 2007
    Publisher: Institute of Electrical and Electronics Engineers
    Relation: 2007 IEEE International Electron Devices Meeting - IEDM '07, Washington, DC, USA, 10-12 Dec. 2007, Pages 91-4
    Keywords: self-aligned nitride MTP cell
    multiple time programming
    CMOS fully compatible process
    logic NVM
    applications
    CMOS technology
    Abstract: A new 45 nm multiple time programming (MTP) cell with self-aligned nitride storage node has been proposed for logic NVM applications. The CMOS fully logic compatible cell has been successfully demonstrated in 45 nm CMOS technology with an ultra small cell size of 0.14 mum2. This cell adapting source side injection programming scheme has a wide on/off window and superior program efficiency. And it also exhibits excellent data retention capability even when logic gate oxide is less than 20 Aring with 45 nm gate length. This new cell provides a promising solution for logic NVM beyond 90 nm node.© 2007 IEEE.
    Relation Link: http://www.ieee.org/
    URI: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/68448
    Appears in Collections:[電機工程學系] 會議論文

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