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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 電機工程學系 > 會議論文  >  A New Self-Aligned Nitride MTP Cell with 45nm CMOS Fully Compatible Process


    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/68609


    Title: A New Self-Aligned Nitride MTP Cell with 45nm CMOS Fully Compatible Process
    Authors: Chia-En Huang;Hsin-Ming Chen;Han-Chao Lai;Ying-Je Chen;Ya-Chin King;Chrong Jung Lin
    教師: 金雅琴
    Date: 2007
    Publisher: Institute of Electrical and Electronics Engineers
    Relation: IEEE International Electron Device Meeting (IEDM), Washington, DC, 10-12 Dec. 2007, Pages 91-94
    Keywords: Self-Aligned
    Nitride
    MTP
    Abstract: A new 45nm Multiple Time Programming (MTP) cell with self-aligned nitride storage node has been proposed for logic NVM applications. The CMOS fully logic compatible cell has been successfully demonstrated in 45nm CMOS technology with an ultra small cell size of 0.14m2. This cell adapting source side injection programming scheme has a wide on/off window and superior program efficiency. And it also exhibits excellent data retention capability even when logic gate oxide is less than 20 with 45nm gate length. This new cell provides a promising solution for logic NVM beyond 90nm node.
    Relation Link: http://www.ieee.org/
    URI: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/68609
    Appears in Collections:[電機工程學系] 會議論文

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