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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 電機工程學系 > 會議論文  >  Wireless Testing of RAM Chips by HOY: Methodology, Architecture, and Prototype Implementation


    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/68840


    Title: Wireless Testing of RAM Chips by HOY: Methodology, Architecture, and Prototype Implementation
    Authors: T.-Y. Chang;C.-T. Huang;J.-J. Liou;C.-W. Wu;H.-P. Ma;C.-C. Tien;C.-H. Wang;C.-U. Yang
    教師: 馬席彬
    Date: 2008
    Publisher: Institute of Electrical and Electronics Engineers
    Relation: ITSW '08: The 15th International Test Synthesis Workshop, UCSB, CA, USA, April 7-9, 2008
    Keywords: Wireless
    RAM
    HOY
    Methodology
    Architecture
    Prototype Implementation
    Relation Link: http://www.ieee.org/
    URI: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/68840
    Appears in Collections:[電機工程學系] 會議論文

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