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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 電機工程學系 > 期刊論文 >  A 1-V CMOS pseudo-differential amplifier with multiple common-mode stabilization and frequency compensation loops


    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/72021


    Title: A 1-V CMOS pseudo-differential amplifier with multiple common-mode stabilization and frequency compensation loops
    Authors: Meng-Hung Shen;Po-Hsiang Lan;Po-Chiun Huang
    教師: 黃柏鈞
    Date: 2008
    Publisher: Institute of Electrical and Electronics Engineers
    Relation: Circuits and Systems II: Express Briefs, IEEE Transactions, Institute of Electrical and Electronics Engineers, Volume 55, Issue 5, May 2008, Pages 409 - 413
    Keywords: CMOS
    Abstract: This paper presents an operational amplifier for a 1-V supply voltage. It comprises three gain stages with ac-boosting and buffered Miller feedback compensation circuits. The implementation uses a standard 0.35-μm CMOS process ( V and V). To accommodate maximum voltage headroom between power rails, a pseudo-differential structure is adopted in this amplifier. The large common-mode gain associated with the structure is suppressed by two common-mode stabilization loops. The amplifier driving 100-pF loads achieves a 4.3-MHz gain-bandwidth product. The settling time of a 1- input step signal is 1.1s. The amplifier consumes 249 μW and occupies 0.06-mm silicon area.
    Relation Link: http://www.ieee.org/
    URI: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/72021
    Appears in Collections:[電機工程學系] 期刊論文

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