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    National Tsing Hua University Institutional Repository > 電機資訊學院 > 電機工程學系 > 期刊論文 >  P-channel lateral double-diffused metal-oxide-semiconductor field-effect transistor with split N-type buried layer for high breakdown voltage and low specific on-resistance


    Please use this identifier to cite or link to this item: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/72516


    Title: P-channel lateral double-diffused metal-oxide-semiconductor field-effect transistor with split N-type buried layer for high breakdown voltage and low specific on-resistance
    Authors: Chorng-Wei Liaw;Ching-Hung Chang;Ming-Jang Lin;Ya-Ching King;Hsu, C.C.-H.;Chrong Jung Lin
    教師: 林崇榮
    Date: 2007
    Publisher: Japan Soceity of Applied Physics
    Relation: JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, Japan Soceity of Applied Physics, Volume 46, Issue 7A, JUL 2007, Pages 4046-4049
    Keywords: specific on-resistance
    breakdown voltage
    split N-type buried layer
    P-channel lateral double-diffused metal-oxide-semiconductor field-effect transistor
    Abstract: Many high voltage complementary metal–oxide–semiconductor (HV-CMOS) processes are modified from a standard 5 V CMOS process by adding an N-type heavily doped layer under the P-well of a HV-PMOS drain terminal to isolate a high voltage P-well from a grounded P-substrate. The limitation of breakdown voltage is dominated by P-well concentration and junction depth. For designing a certain breakdown voltage (BVdss) for a HV-PMOS, the original 5 V CMOS P-well concentration should be decreased, which could degrade 5 V CMOS characteristics, such as NMOS punch through and latch-up immunity. In this study, we demonstrate a novel HV-PMOS based on a split N-type buried layer (NBL), which provides a high BVdss in a HV-CMOS process. The newly proposed device with NBL split under the P-well of a drain electrode increases BVdss without degrading specific on-resistance (Ron,sp) and any added process complexity. From this result, P-well concentration could be increased to improve both 5 V NMOS characteristics and HV-PMOS Ron,sp.
    Relation Link: http://www.jsap.or.jp/english/
    URI: http://nthur.lib.nthu.edu.tw/dspace/handle/987654321/72516
    Appears in Collections:[電機工程學系] 期刊論文

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