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    NTHUR > College of Electrical Engineering and Computer Science > Department of Electrical Engineering > EE Journal / Magazine Articles  >  A New Differential P-Channel Logic-Compatible Multiple-Time Programmable (MTP) Memory

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    Title: A New Differential P-Channel Logic-Compatible Multiple-Time Programmable (MTP) Memory
    Authors: Te-Liang Lee;Yi-Hung Tsai;Wun-Jie Lin;Hsiao-Lan Yang;Chiu-Wang Lien;Chrong Jung Lin;Ya-Chin King
    Teacher: 林崇榮
    Date: 2011
    Publisher: Institute of Electrical and Electronics Engineers
    Relation: IEEE ELECTRON DEVICE LETTERS, Institute of Electrical and Electronics Engineers, Volume 32, Issue 5, MAY 2011, Pages 587-589
    Keywords: Differential read
    floating gate logic nonvolatile memories
    logic-nonvolatile memory (NVM)
    multiple-time programmable (MTP)
    p-channel nonvolatile memory (NVM)
    Abstract: This letter presents a novel differential p-channel logic-compatible multiple-time programmable (MTP) memory cell. This MTP cell has a pair of floating gates, and performs differential read to increase the on/off window. Additionally, a novel self-recovery operation is implemented to boost the floating gate level, thus avoiding the charge-loss problem due to the thin gate oxide requirement in advance logic nonvolatile memory applications. This differential cell with its self-recovery operation is a very promising MTP solution for gate oxide layer with a 70 angstrom thickness, and can be implemented by 3.3 V I/O in 90 nm and the advanced CMOS logic processes such as 45 nm and beyond.
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    Appears in Collections:[Department of Electrical Engineering] EE Journal / Magazine Articles
    [Institute of Electronics Engineering ] ENE Journal / Magazine Articles

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